Delay-inducing defects are causing increasing concern in the semiconductor industry today, particularly at the leading-edge 130- and 90- nanometer nodes. To effectively test for such defects, the ...
ATPG targets faults at IC-gate boundaries, but 50% of defects are located within cells. Learn how cell-aware ATPG and user-defined fault models help to ferret out these hard-to-squash bugs.
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