Cadence Announces Collaboration with Intel Foundry to Accelerate Intel 14A Process Optimization for HPC and Mobile Designs

Cadence (Nasdaq: CDNS) today announced an expanded collaboration with Intel Foundry to advance Design Technology ...
Barchart on MSN

Cadence Design is cementing its place in the 2nm AI chip race by solving the die size limit in partnership with a major chipmaker

Cadence Design Systems (CDNS) has just announced a multi-year partnership with Samsung Foundry to provide chipmakers a fully ...

AI ‘virtual engineer’ has slashed chip production time. The stock is rising.

Cadence Design Systems stock was climbing as it said its AI agent can now independently carry out complex work on chip design ...
DatacenterDynamics

Cadence brings chip verification to the next level with AI agents

Bringing agentic AI into chip verification to accelerate design cycles, improve verification quality, and increase ...
Design And Reuse

Samsung’s 2nm Advance Draws on EDA Innovation from Cadence, Siemens, and Synopsys

Synopsys, Cadence, and Siemens simultaneously announced expanded certified design flows, IP portfolios, and AI-driven capabilities on Samsung Foundry’s 2nm class processes at SAFE Forum 2026. The ...

Nvidia And Cadence Claim Breakthrough In AI-Powered Chip Design

Cadence and Nvidia have teamed to present the first example of Level 5 AI EDA agent to automate the work of design ...
Business Wire

Cadence Digital, Custom/Analog Design Flows Certified and Design IP Available for Intel 16 FinFET Process

SAN JOSE, Calif.--(BUSINESS WIRE)--Cadence Design Systems, Inc. (Nasdaq: CDNS) today announced its digital and custom/analog flows are certified on the Intel 16 FinFET process technology and its ...
Manila Standard

Cadence and Samsung Foundry deepen 2nm and 3D‑IC collaboration to meet surging AI infrastructure and physical AI demand

Multi-year agreement expands Memory, NVIDIA NVLink-C2C and advanced Interface IP, and agentic AI-optimized GPU‑accelerated ...
Nasdaq

Cadence Advances Hyperscale SoC Design with Expanded IP Portfolio for TSMC N3E Process Featuring Next-Generation 224G-LR SerDes IP

Proven interface IP architectures realized significant gains in performance and power efficiency on the TSMC N3E process 224G-LR SerDes PHY IP on the TSMC N3E process has achieved first-pass silicon ...
Nasdaq

Cadence Digital and Custom/Analog Design Flows Certified by TSMC for Latest N3E and N4P Processes

Companies collaborate to accelerate next-generation mobile, AI and hyperscale design innovation Customers actively designing with new N3E and N4P PDKs Cadence digital and custom/analog flows optimized ...