Peking University unveils 3D design tool to power Huawei’s chip ambitions

The university's new chip design software is compatible with Huawei's LogicFolding architecture introduced on Monday ...

Cadence: The Silicon Arms Race Is Just Getting Started

Cadence Design Systems is rated Buy with a 12-month price target of $470, driven by semiconductor complexity. Click here to ...
Tom's Hardware on MSN

Chinese university builds 3D chip design tool tailored to Huawei's 'LogicFolding' architecture

China now has a prototype tool designed for vertical circuit stacking.
DIGITIMES

Huawei's Tau Law exposes China's EDA gap; Empyrean advances memory chip design tools

Huawei's recently proposed Tau Law has drawn attention across the semiconductor industry, with the company arguing that chip ...
U.S. News & World Report

TSMC, Chip Design Software Firms Tap AI to Help Chips Use Less Energy

SANTA CLARA, California - (Reuters) -The computing chips that power artificial intelligence consume a lot of electricity. On Wednesday, the world's biggest manufacturer of those chips showed off a new ...
Nasdaq

Cadence and Google Collaborate to Scale AI-Driven Chip Design with ChipStack AI Super Agent on Google Cloud

Integration of Google’s Gemini models with Cadence ChipStack AI Super Agent accelerates next-generation, agent-driven design automation SAN JOSE, Calif.--(BUSINESS WIRE)-- Cadence, an industry leader ...
DIGITIMES

Peking University's true-3D EDA tool gives Huawei's LogicFolding chip roadmap critical design link

Peking University researchers have unveiled a prototype electronic design automation (EDA) tool built for "true-3D" chip ...