IEEE

PRO-TIME: Prerouting Optimization-Aware Timing Prediction via Multimodal Learning

Abstract: Fast and accurate prerouting timing prediction is crucial in the very-large-scale integration (VLSI) design flow. Existing machine learning (ML)-assisted prerouting timing evaluators neglect ...
IEEE

Design and Implementation of Sequential Element Based on CNTFET Using Multi-Threshold Style for Low Power and High-Performance VLSI Architectures

Abstract: As CMOS technology nears its scaling limits, Carbon Nanotube Field Effect Transistors (CNTFETs) have emerged as a promising alternative due to their tremendous electrical properties, along ...