Electronic Design

HPC And “Big Data” Apps Tap Floating-Point Number Compression

Floating-point values contain three fields: a sign bit, exponent bits, and significand or mantissa bits. The IEEE-754 floating-point number format defined a common floating-point format that most ...
Design-Reuse

Implementing Floating-Point Algorithms in Real Hardware: Remember the Adaptation Step

As more applications become more compute-intensive, a seeming detail—the way the application represents numbers internally—can make or break a project. This is no news for experienced digital signal ...
EDN

Tutorial: Floating-point arithmetic on FPGAs

[Editor's note: For an intro to fixed-point math, see Fixed-Point DSP and Algorithm Implementation. For a comparison of fixed- and floating-point hardware, see Fixed vs. floating point: a surprisingly ...
Semiconductor Engineering

AI Chips Must Get The Floating-Point Math Right

Most AI chips and hardware accelerators that power machine learning (ML) and deep learning (DL) applications include floating-point units (FPUs). Algorithms used in neural networks today are often ...
Design-Reuse

How to Reduce FPGA Logic Cell Usage by >x5 for Floating-Point FFTs

Here we provide rational for using Centar’s floating-point IP core for the new Altera Arria 10 and Stratix 10 FPGA platforms. After a short contextual discussion section, a comparison of various FFT ...