Hackaday

Tick, Tock, Train Station Clock

We’ve seen a few H-bridge circuits around these parts before, and here’s another application. This time we have an Old Train ...
GitHub

dulatello08/litex-cpu-testing

This project integrates a custom SystemVerilog module with LiteScope for debugging on the ULX3S FPGA, using the standard USB/UART connection (no JTAG probe required). rtl/: SystemVerilog source files.
GitHub

Tutorial: Development and Deployment of SNNs on FPGA for Embedded Applications

This tutorial provided a comprehensive walkthrough of our toolchain, designed to streamline the development and deployment of Spiking Neural Networks (SNNs) onto our (unreleased) custom event-based ...
IEEE

A Review of Advancements and Trends in Time-to-Digital Converters Based on FPGA

Abstract: Recently, advancements have been made in the design, implementation, and application of time-to-digital converters (TDCs) based on field-programmable gate array (FPGA) technology. The ...
IEEE

An FPGA-Based Event-Driven SNN Accelerator for DVS Applications With Structured Sparsity and Early-Stop

Abstract: This paper proposed an algorithm-hardware co-design of an event-driven spiking neural network (SNN) accelerator for classification tasks of event-based data from dynamic vision sensors (DVS) ...