IEEE

2-D FET Modeling: Why Incorporating the Gate- and Drain-Dependent Source Tunneling Barriers Matter

Abstract: This paper presents the modeling of a two-dimensional (2-D) field-effect transistor (FET). By considering two tunneling regions at the source and showing how these regions vary with the gate ...
IEEE

A Scalable Physics-Based Compact Model for Terminal Charge, Intrinsic Capacitance and Drain Current in Nanosheet Field Effect Transistors

Abstract: This study introduces a physics-based, SPICE-compatible model for Nanosheet Field-Effect Transistors (NsFETs) that offers explicit expressions for the drain current, terminal charges, and ...