Design-Reuse

Mentor Graphics Extends Catapult C Synthesis Product; Enables 20X to 100X Faster Verification with SystemC

WILSONVILLE, Ore., May 2, 2005 - Mentor Graphics® Corporation (Nasdaq: MENT) today announced extensions to its Catapultâ„¢ C Synthesis algorithmic synthesis tool, a leading electronic system level ...
Business Wire

Mentor Graphics Questa Vanguard Program Drives Expansion of SystemVerilog Ecosystem; Third-Party Verification IP Qualified with Questa

Membership in the Questa Vanguard Program is open to those companies who work with Mentor Graphics verification customers and wish to promote the development and use of EDA tools, verification IP, ...
AOL

Mentor Graphics Verification Academy Launches Coverage Cookbook

In functional verification, methodology is the bridge between tools and technologies, which creates a productive, predictable, and repeatable solution. This first phase of the Coverage Cookbook ...
EDN

JNTU draws on Mentor Graphics, Trident Techlabs expertise

Mentor Graphics Corp. and Trident Techlabs Pvt. Ltd, will lend their expertise to Jawaharlal Nehru Technology University (JNTU), Hyderabad, to help students gain proficiency in VLSI design and ...
Design-Reuse

Mentor Graphics Adds Memory Models to Create Industry's First Complete UVM SystemVerilog Verification IP Library

WILSONVILLE, Ore., Feb. 29, 2016 – Mentor Graphics Corporation (NASDAQ: MENT) today announced availability of the first entirely native UVM SystemVerilog memory verification IP library for all ...