EDN

Troubleshooting a transaction-level model

The goal of OSCI (Open SystemC Initiative) TLM (transaction-level modeling) 2.0 is to enable high-level component models to simply plug into and play with each other in a system model. The standard ...
EDN

The ‘what’ and ‘why’ of transaction level modeling

Advances in both the physical properties of chips and in design tools allow us build huge systems into “just a few” square millimeters. The problem is that modeling these systems at the ...
Semiconductor Engineering

An Inside Look At Transaction-Level Power Modeling

With design complexity always on the rise and an increasing amount of embedded software encapsulation in designs today, engineering teams need to be concerned with power consumption in the initial ...
Electronic Design

Transaction-Level Models Are Becoming Easier To Use

Transaction-level modeling (TLM) verification methodologies are propagating down from power users, such as large systems houses and integrated device manufacturers, to the broader design community. As ...
Semiconductor Engineering

End-User Report: Interoperability Still Lacking With System-Level Power Modeling

SLD: How long has NXP designed at the system-level for production chips? Frans Theeuwen: It depends on what you call ‘system-level design.’ We have been doing hardware/software co-verification ...