RISC-V is a general-purpose license-free open Instruction Set Architecture [ISA] with multiple extensions. It is an ISA separated into a small base integer ISA, usable as a base for customized ...
Lexra has created a single-issue, seven-stage pipeline core to combine DSP and risc instructions for applications such as third-generation (3G) handsets. The LX5380, which uses the MIPS instruction ...
SiFive keeps cranking out new versions of its RISC-V cores. Its two most recent additions include the Performance P550 core and the Performance P270 vector core, which target high-performance ...
The previous installment in this series took us from the rise of the PowerPC line into the line’s heyday as a leader in the RISC workstation market. During the reign of the PowerPC 600 series, Apple ...
Semidynamics has announced a customisable vector unit for RISC-V processor cores, compliant with RISC-V vector specification 1.0. Vector unit are composed of several vector cores that perform multiple ...
AndesCore™ AX45MPV 64-bit multicore CPU IP is an 8-stage superscalar processor with Vector Processing Unit (VPU) based on AndeStar™ V5 architecture. It supports RISC-V standard “G (IMA-FD)”, ...
SAN JOSE, Calif., June 20, 2024 (GLOBE NEWSWIRE) -- Breker Verification Systems, whose product portfolio solves challenges across the functional and system verification process for large, complex ...
Who is using RISC-V? Judging from this year’s RISC-V Workshop, it appears many more firms have decided to enter the fray—with more to come. Nvidia gave a presentation about how its proprietary Falcon ...
The process of design, development and testing of a processor takes a long time, during which many models are made to fine-tune its functionality and performance. These models simulate the processor ...
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