Semiconductor Engineering

Simplifying HW/SW Co-Verification With PSS Led UVM And C Tests

The complexity of system on chips (SoCs) continues to grow rapidly with the integration of more functionality onto a single chip. As a result, traditional verification methodologies struggle to keep ...
Semiconductor Engineering

Verification As A Flow (Part 1)

Semiconductor Engineering sat down to discuss the transformation of verification from a tool to a flow with Vladislav Palfy, global manager application engineering for OneSpin Solutions; Dave Kelf, ...
Design-Reuse

AMIQ EDA Announces its Design and Verification Tools Eclipse IDE Supports First Release of Accellera Portable Test and Stimulus Standard (PSS)

SAN JOSE, Calif.-- July 11, 2018 -- AMIQ EDA today announced its Design and Verification Tools (DVT) Eclipse IDE supports Portable Test and Stimulus Standard (PSS) 1.0 as released by Accellera Systems ...
Electronic Design

11 Myths About the Portable Stimulus Standard

Developing advanced semiconductor chips gets harder all the time, pushing electronic design automation (EDA) vendors to innovate in their tools and methodologies. They’re working constantly to improve ...