Design-Reuse

PLDA Furthers Its PCIe Industry Leadership with the Introduction of the World's First PCI Express 3.0-Based IP for ASIC and FPGA

PLDA’s XpressRich3 IP will be available for review at the PCI-SIG® Developers Conference, June 23-24, 2010 SAN JOSE, Calif. (June 7, 2010) — PLDA, the industry leader in the PCI Express® and ...
EDN

IDT Extends Timing Leadership with Introduction of New Series of PCI Express Timing Solutions

SAN JOSE, Calif., November 3, 2008 – IDT® (Integrated Device Technology, Inc.; NASDAQ: IDTI), a leading provider of essential mixed signal semiconductor solutions that enrich the digital media ...
EDN

A Demonstration of PCI Express Generation 3 over a Fiber Optical Link

In 2007, the PCI SIG released an external cabling specification enabling interconnection of PCI Express systems at 2.5 Gb/s (Generation 1) and 5Gb/s (Generation 2), facilitating access to PCIe ...
Hexus

Review: ATI PCI Express Introduction

PCI Express is just around the corner in terms of Intel releasing a supporting mass market chipset, with the other usual core logic suspects doing their own PCI Express dances in the near future. With ...
The Verge

PCIe 6.0 is coming for the speedy SSDs and GPUs of the future

Posts from this topic will be added to your daily email digest and your homepage feed. is a senior editor and author of Notepad, who has been covering all things Microsoft, PC, and tech for over 20 ...
Electronic Design

Choose The Optimum Clock Source For PCI Express Applications

PCI Express is an interface standard developed by the Peripheral Component Interconnect Special Interest Group (PCI-SIG). Originally designed for desktop personal computers, it’s used across a range ...